1. Field of the Invention
The present invention relates to a package for a semiconductor device, and more particularly to a method and apparatus for a fine pitch substrate to be used in a TAB interconnect package.
2. Background Information
Semiconductor devices such as integrated circuits may be packaged in various packages including, for example, plastic pin grid array (PPGA), plastic ball grid array (PBGA), ceramic pin grid array (CPGA), ceramic ball grid array (CBGA), and multi-chip modules (MCM). In these packages, tape automated bonding (TAB), or, a variant thereof known as flip-TAB, may be used to interconnect the integrated circuit chip with the package substrate. FIG. 1 shows an example of a TAB tape 100 used to couple an integrated circuit to a substrate. The TAB tape 100 shown in FIG. 1 is described in co-pending U.S. application Ser. No. 08/255,247, filed Jun. 6, 1994, which application is assigned to the assignee of the present invention. The TAB tape 100 comprises a tape 101 typically comprising polyimide. Additionally, the TAB tape 100 comprises sprockets and various alignment marks to aid in the manufacturing of the TAB tape 100 and in the packaging process.
The TAB tape 100 also comprises a plurality of conductive traces 105 which couple the integrated circuit to the substrate, in a manner to be described below. Each of the conductive traces 105 has a first end 106 extending into opening 102 of the TAB tape 100. This portion of the conductive trace 105 is known as the "inner lead" (IL), which is bonded to the chip in an inner lead bonding (ILB) process. As shown, the TAB tape 100 comprises numerous traces 105 terminating on each side of a generally rectangular shape for connection to a chip. Typically, there may be well over 100 traces 105 per side. It will be appreciated that a greater or lesser number of conductive traces 105 may be present on each side, and further, that, depending upon the device to be packaged, there may not be leads on all of the four sides but rather may, for example, be leads present on only two of the sides.
As shown, the TAB tape 100 comprises a plurality of openings or windows 103, which are called "outer lead bonding" (OLB) windows. The portion of conductive traces 105 extending across windows 103 comprise the land portions 107 of the traces 105 which will be bonded to a substrate such as those described above in an outer lead bonding process such as, for example, hot bar reflow, thermalsonic bonding, or ultrasonic bonding. Note that the pitch (distance between a point on a trace and the same point on the next trace) of the conductive traces 105 is typically smaller at the ends 106 than at the windows 103. This increase in pitch (and consequent increase in span across the traces 105) is known as inner lead-outer lead (IL-OL) fanout. This fanout is necessary to accommodate the outer lead bonding process manufacturing requirements. A problem with the fanout is that it increases the TAB footprint, thus requiring a larger package. The larger size increases the cost of the package, and is contrary to the trend of shrinking the overall package dimension of semiconductor devices.
FIG. 2 shows a portion of land pads 201 present on prior art package substrate 200. The land pads 201 are disposed on the substrate in a position corresponding to the land portions 107 of the conductive traces 105 within window 103. As mentioned above, each of the traces 105 is bonded to one of the land pads 201 by a variety of prior art methods. Typically, the pitch of the land pads 201 may be, for example, approximately 0.25 millimeters (mm). Also typically, the width of each land pad 201 and the space between each land pad 201 may be approximately equal, e.g., 0.125 mm. Of course, these dimensions may vary. As is well known, each of the pads 201 may be further coupled to, e.g. pins, by way of leads and vias on and within substrate 200 to allow for connection of the integrated circuit chip to other devices or systems.
As semiconductor device die sizes continue to shrink and/or more contact pads are added to the die, it becomes desirable to decrease the pitch of the land pads 201 on a substrate to keep the package smaller and less costly. For example, the pitch of the land pads on the various package substrates can be expected to be required to decrease to approximately 0.1 mm or less in the near future. However, such a fine pitch is not attainable with satisfactory yield and reliability on package substrates using conventional package substrate manufacturing technology. For example, package substrates may typically be manufactured using co-fired technology, wherein the pads and circuitry are attached to an uncured ceramic material, which is then fired and later cooled to create a hard ceramic substrate. Alternatively, the land pads and leads may be printed on a substrate by screening. While a finer pitch may be attainable using thin film substrate technology typical of semiconductor device fabrication, this technology is far more costly than the conventional package substrate manufacturing described above. Another approach is to use conventional package substrate manufacturing technology in a multi-shelf design. That is, the land pads are located on different levels of the package to increase the effective pitch. However, this approach is also costly.
Although the leads coupled to the land pads 201 on and within substrate 200 may be satisfactorily printed using conventional technology with a dimension of approximately 50 microns (0.05 mm) or so, it should be noted that some type of land pad larger than the lead width is necessary as it would be difficult to bond directly to these leads. That is, it is not practical to use land pads of this dimension, with a spacing approximately equal to this dimension, as the land portions 107 of traces 105 cannot reliably be bonded to such fine dimension land pads, without interlead shorting. Thus, while it is desirable to have minimum dimension land pads at a fine pitch to allow for smaller and lower cost packages, the OLB process may be more reliably carried out with larger land pads, spaced a sufficient distance apart.
What is needed is a method and apparatus to allow for fine pitch land pads using currently available low cost packaging technology and materials. It is desirable that the fine pitch land pads allow for interconnection to a fine pitch TAB part, with high reliability, without lead to lead shorting. It is further desired that the method and apparatus minimize or eliminate IL-OL fanout to allow for a smaller TAB footprint, thereby reducing package cost further.